silk.simd.f32x4.
Operations on simd<f32, 4>: four 32-bit float lanes in one 128-bit vector.
When to use#
Use this module to work on four f32 values at once. Use load and store
to move lanes between a slice and a vector, a lane comparison such as lanesEqual to make
a mask<4>, and silk.simd.mask4 to test that mask.
Details#
The operators +, -, *, / and % apply lane by lane and follow IEEE 754 as the
f32 operators do. == is true only when every lane is equal, and a NaN lane is never
equal. reduceAdd adds lanes in order, so it gives the same result on every target.
Lane 0 is at the lowest address in memory.
Examples#
Scale every lane and add the results#
import silk.simd.f32x4
pub fn main() -> i32 {
let values = f32x4.fromArray([1.0, 2.0, 3.0, 4.0])
let doubled = f32x4.mulAdd(values, f32x4.splat(2.0), f32x4.splat(0.0))
if f32x4.reduceAdd(doubled) != 20.0 {
return 1
}
return 0
}Import as f32x4 with import silk.simd.f32x4 as f32x4.
Public declarations: 40.
LANES#
pub const LANES: usizeThe number of lanes in a vector.
splat#
pub fn splat(lane: f32) -> simd<f32, 4>Returns a vector with every lane set to lane.
fromArray#
pub fn fromArray(lanes: [f32; 4]) -> simd<f32, 4>Returns a vector whose lane i is lanes[i].
toArray#
pub fn toArray(vector: simd<f32, 4>) -> [f32; 4]Returns the lanes of vector as an array, in lane order.
extract#
pub fn extract(vector: simd<f32, 4>, index: usize) -> f32Returns lane index of vector. Traps when index is LANES or more.
insert#
pub fn insert(vector: simd<f32, 4>, index: usize, lane: f32) -> simd<f32, 4>Returns vector with lane index replaced by lane. Traps when index is LANES or more.
load#
pub fn load(lanes: &[f32], offset: usize) -> simd<f32, 4>Reads LANES lanes of lanes starting at offset.
Gotchas#
Traps unless offset + LANES is at most lanes.length. The slice needs no alignment beyond
f32.
store#
pub fn store(lanes: &mut [f32], offset: usize, vector: simd<f32, 4>) -> ()Writes the lanes of vector into lanes starting at offset.
Gotchas#
Traps unless offset + LANES is at most lanes.length.
loadUnchecked#
pub unsafe fn loadUnchecked(pointer: [*]const f32) -> simd<f32, 4>Reads LANES lanes starting at pointer, with no bounds check.
Gotchas#
The caller proves that pointer addresses LANES live lanes aligned to f32.
storeUnchecked#
pub unsafe fn storeUnchecked(pointer: [*]mut f32, vector: simd<f32, 4>) -> ()Writes the lanes of vector starting at pointer, with no bounds check.
Gotchas#
The caller proves that pointer addresses LANES writable lanes aligned to f32.
lanesEqual#
pub fn lanesEqual(left: simd<f32, 4>, right: simd<f32, 4>) -> mask<4>Returns a mask with lane i set where lane i of left is equal to lane i of right. A comparison with a
NaN lane is false.
lanesNotEqual#
pub fn lanesNotEqual(left: simd<f32, 4>, right: simd<f32, 4>) -> mask<4>Returns a mask with lane i set where lane i of left is not equal to lane i of right. A NaN lane is
not equal to any lane.
lanesLess#
pub fn lanesLess(left: simd<f32, 4>, right: simd<f32, 4>) -> mask<4>Returns a mask with lane i set where lane i of left is less than lane i of right. A comparison with a
NaN lane is false.
lanesLessOrEqual#
pub fn lanesLessOrEqual(left: simd<f32, 4>, right: simd<f32, 4>) -> mask<4>Returns a mask with lane i set where lane i of left is less than or equal to lane i of right. A comparison with a
NaN lane is false.
lanesGreater#
pub fn lanesGreater(left: simd<f32, 4>, right: simd<f32, 4>) -> mask<4>Returns a mask with lane i set where lane i of left is greater than lane i of right. A comparison with a
NaN lane is false.
lanesGreaterOrEqual#
pub fn lanesGreaterOrEqual(left: simd<f32, 4>, right: simd<f32, 4>) -> mask<4>Returns a mask with lane i set where lane i of left is greater than or equal to lane i of right. A comparison with a
NaN lane is false.
select#
pub fn select(mask: mask<4>, chosen: simd<f32, 4>, other: simd<f32, 4>) -> simd<f32, 4>Returns lane i of chosen where lane i of mask is set, and lane i of other elsewhere.
minimum#
pub fn minimum(left: simd<f32, 4>, right: simd<f32, 4>) -> simd<f32, 4>Returns the smaller lane of each pair. A NaN lane in either input gives NaN, and -0.0 is
less than 0.0.
maximum#
pub fn maximum(left: simd<f32, 4>, right: simd<f32, 4>) -> simd<f32, 4>Returns the larger lane of each pair. A NaN lane in either input gives NaN, and -0.0 is
less than 0.0.
shuffle#
pub fn shuffle(left: simd<f32, 4>, right: simd<f32, 4>, static indices: [usize; 4]) -> simd<f32, 4>Returns a vector whose lane i is lane indices[i] of left followed by right.
Details#
An index below LANES selects from left, and an index from LANES to 2 * LANES - 1
selects from right. The indices are static, so each call is one fixed lane permutation.
reduceAdd#
pub fn reduceAdd(vector: simd<f32, 4>) -> f32Returns the sum of every lane, added in lane order from lane 0.
reduceAddUnordered#
pub fn reduceAddUnordered(vector: simd<f32, 4>) -> f32Returns the sum of every lane, added in the order the target prefers.
Gotchas#
The rounding can differ between targets. Use reduceAdd for a result that is the same
everywhere.
reduceMinimum#
pub fn reduceMinimum(vector: simd<f32, 4>) -> f32Returns the smallest lane. A NaN lane gives NaN.
reduceMaximum#
pub fn reduceMaximum(vector: simd<f32, 4>) -> f32Returns the largest lane. A NaN lane gives NaN.
sqrt#
pub fn sqrt(vector: simd<f32, 4>) -> simd<f32, 4>Returns the square root of each lane. A negative lane gives NaN.
mulAdd#
pub fn mulAdd(left: simd<f32, 4>, right: simd<f32, 4>, addend: simd<f32, 4>) -> simd<f32, 4>Returns left * right + addend for each lane, with one rounding.
toU32x4#
pub fn toU32x4(vector: simd<f32, 4>) -> simd<u32, 4>Converts each lane to u32 as the scalar conversion does. Traps when any lane does not
fit u32.
toI32x4#
pub fn toI32x4(vector: simd<f32, 4>) -> simd<i32, 4>Converts each lane to i32 as the scalar conversion does. Traps when any lane does not
fit i32.
toU64x4#
pub fn toU64x4(vector: simd<f32, 4>) -> simd<u64, 4>Converts each lane to u64 as the scalar conversion does. Traps when any lane does not
fit u64.
toI64x4#
pub fn toI64x4(vector: simd<f32, 4>) -> simd<i64, 4>Converts each lane to i64 as the scalar conversion does. Traps when any lane does not
fit i64.
toF64x4#
pub fn toF64x4(vector: simd<f32, 4>) -> simd<f64, 4>Converts each lane to f64 as the scalar conversion does.
bitcastToU8x16#
pub fn bitcastToU8x16(vector: simd<f32, 4>) -> simd<u8, 16>Returns the bits of vector as a simd<u8, 16>, in memory order.
bitcastToI8x16#
pub fn bitcastToI8x16(vector: simd<f32, 4>) -> simd<i8, 16>Returns the bits of vector as a simd<i8, 16>, in memory order.
bitcastToU16x8#
pub fn bitcastToU16x8(vector: simd<f32, 4>) -> simd<u16, 8>Returns the bits of vector as a simd<u16, 8>, in memory order.
bitcastToI16x8#
pub fn bitcastToI16x8(vector: simd<f32, 4>) -> simd<i16, 8>Returns the bits of vector as a simd<i16, 8>, in memory order.
bitcastToU32x4#
pub fn bitcastToU32x4(vector: simd<f32, 4>) -> simd<u32, 4>Returns the bits of vector as a simd<u32, 4>, in memory order.
bitcastToI32x4#
pub fn bitcastToI32x4(vector: simd<f32, 4>) -> simd<i32, 4>Returns the bits of vector as a simd<i32, 4>, in memory order.
bitcastToU64x2#
pub fn bitcastToU64x2(vector: simd<f32, 4>) -> simd<u64, 2>Returns the bits of vector as a simd<u64, 2>, in memory order.
bitcastToI64x2#
pub fn bitcastToI64x2(vector: simd<f32, 4>) -> simd<i64, 2>Returns the bits of vector as a simd<i64, 2>, in memory order.
bitcastToF64x2#
pub fn bitcastToF64x2(vector: simd<f32, 4>) -> simd<f64, 2>Returns the bits of vector as a simd<f64, 2>, in memory order.
Category: SIMD.
Profiles: aarch64-apple-darwin, aarch64-unknown-linux-gnu, aarch64-unknown-linux-gnu-no-libc, x86_64-unknown-linux-gnu, x86_64-unknown-linux-gnu-no-libc, wasm32-unknown-unknown, wasm32-wasip1, wasm32-wasip2.